Structured Electronic Design

color coded resistors

Now available from Delft Academic Press:

Structured Electronic Design first edition € 85.00 incl. 6% VAT,

ISBN 97890-6562-4277: 631 pages, paperback 279 x 210 x 41mm. Course book for:

Author has more than 35 years of experience in analog design and post graduate design education.

About this book

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Contents and summary

Download a PDF summary.


Dear reader, although I did my best to avoid any errors, they seem to be inevitable; my apologizes for that.

I kindly request you to mail me any correction or suggestion for improvement. Thanks in advance!

  1. Page 39, expression 2.15 should be:

    \[A_{i}=\frac{I_{\ell }}{I_{s}}=\frac{1}{A\frac{Z_{\ell }}{Z_{s}}+B\frac{1}{Z_{s}}+CZ_{\ell }+D}.\]
  2. Chapter 5:

    The CS stage operating point and device characteristics should be simulated using the library file CMOS18-0.lib. The figures in the book are generated with this library.

  3. Page 166, netlist file at the bottom of the page should be CSbiased0_9V-10uAViVo.cir.

3-rd party spice based CAD software

A free version of the SPICE simulator SIMetrix can be downloaded from:

SPICE simulations can also be performed with LTspice, but some circuit files include graphic post-processing instructions that can only be processed by SIMetrix.

Support material

Chapter 1 Introduction

Chapter 2 Modeling and specification of amplifiers

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Chapter 3 Amplification mechanism

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Chapter 4 Active devices

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  1. Page 104: SPICE output characteristics of an NPN transistor:
  2. Page 106: SPICE Gummel plot of an NPN transistor:
  3. Page 108: SPICE cut-off frequency versus IC of NPN transistor:
  4. Page 109: SPICE biasing of NPN transistor:
  5. Page 117: SPICE output characteristics NJFET:
  6. Page 132: SPICE small-signal parameters of hybrid-\(\pi\) equivalent circuit:
  7. Page 147: SLiCAP subcircuit BJTV4:
  8. Page 148: ‘CMOS18N’ SLiCAP NMOS subcircuit with EKV model (parameters: W, L, ID):
  9. Page 150: ‘CMOS18N_V’ SLiCAP NMOS subcircuit with EKV model (parameters: W, L, VD, VG, VS):
  10. Page 152-153: Files for plotting EKV device characteristics:

Chapter 5 Basic amplification CS stage


  1. Chapter 5: CMOS 18 library file for educational purposes only:
  2. Page 163, example 5.1:
  3. Page 163, example 5.2:
  4. Page 166, section 5.2.1, voltage-to-current transfer:
  5. Page 166, section 5.2.1, voltage transfer:
  6. Page 167, section 5.2.1, output characteristics:
  7. Page 173, Example 5.3:
  8. Page 175, SLiCAP ‘NM18_noise’ subcircuit MOS EKV noise model (parameters: W, L, ID, IG):
  9. Page 175-176, SLiCAP files for plotting MOS noise:
  10. Page 176, SLiCAP ‘J_noise’ subcircuit with noise model for JFET and large MOS (parameters: W, L, ID, IG):
  11. Page 181-184, Example 5.5 and 5.7: SLiCAP files for evaluation of pole-splitting in CS stage:
  12. Page 191-195, Example 5.10: SLiCAP files for noise optimization of a CS stage with a resistive source:
  13. Page 195, Example 5.11: SPICE (SIMetrix) file for noise optimization of a CS stage with a resistive source:
  14. Page 200-207, Example 5.13: SLiCAP files for noise optimization of a CS stage with a capacitive source:

Chapter 6 Balancing techniques


  1. Page 225: Large-signal static transfer of an anti-series CS stage. Spice (SIMetrix) file:
  2. Page 230: Large-signal static transfer of a complementary-parallel CS stage. Spice (SIMetrix) file:

Chapter 7 Design of feedback amplifier configurations

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  1. Page 255, Example 7.8: Files for calculating the source-referred noise of a passive-feedback voltage amplifier:


Chapter 8 Application and specification of operational amplifiers


  1. Collection of LTspice subcircuits used in this chapter: LTspice.lib.
  2. Page 287 LTspice simulation test bench for determination of voltage gain and output impedance of an operational amplifier:
  3. Page 288 LTspice simple small-signal opamp model using an Laplace building block:
  4. Page 288 LTspice model of a noise-free parallel RC network using a Laplace building block:
  5. Page 290 Spice subcircuit of a noise voltage source including 1/f noise:
  6. Page 291 Spice subcircuit of a noise current source including 1/f noise:
  7. Page 291 Spice subcircuit for a nullor with equivalent input voltage and current noise sources:
  8. Page 292 LTspice example of a DC voltage source with a Gaussian distribution of the voltage:

Chapter 9 Introduction to amplifier biasing


  1. Pages 311-336 All files for the design and analysis of the variance of the DC bias point of a voltage amplifier:

Chapter 10 Modeling of negative feedback circuits

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  1. SLiCAP project file for running the scripts from this chapter:
  2. Page 335, Example 10.1: files for obtaining the gain and loop gain of a passive feedback voltage amplifier with VCVS controller:
  3. Page 336, Example 10.2: files for obtaining the gain and loop gain of a passive feedback voltage amplifier with CCCS controller:
  4. Page 342-348, Example 10.3 and 10.4: files for obtaining the gain and loop gain of a passive feedback voltage amplifier with current feedback operational amplifier as controller:

Chapter 11 Amplifier performance and controller requirements

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Chapter 12 Frequency compensation

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Chapter 13 Local feedback stages

Chapter 14 Multi-stage feedback

Chapter 15 Amplifier Biasing

Chapter 16 Signal Modeling (selected topics)

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CHapter 17 System Modeling (selected topics)

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Chapter 18 Network Theory (selected topics)

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Chapter 19 Noise in electronic systems

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Design exercise

You can download an example of the step-by-step design of a transimpedance amplifier using SLiCAP as design and documentation tool.